AdventureVision CPU

ADVENTUREVISION [WIKI]

CPU (Intel 8048)

8048 is a 8-bits microcomputer and part of MCS-48 family but only this chip is used in the AdventureVision.
Oscillator is divided by 15, /3 Counter on the osc circuit and 5 states on each instruction clock.

Chip specifications

  • Intel’s advanced N-channel silicon gate HMOS process.
  • Internal ROM: 1K x 8 ROM (One-time programmable?)
  • Internal RAM: 64 x 8 RAM
  • 8-bits timer/counter
  • 27 I/O lines:
    • Port 1, 8-bits IO
    • Port 2, 8-bits IO
    • BUS, 8-bits IO
    • T0, 1-bit Input only
    • T1, 1-bit Input only
    • INT, 1-bit Input only
  • All instructions are 1 or 2 cycles

AdventureVision interface

BUS
All 8 pins are connected to the socket and external RAM, using BUS instructions has no real meaning and should be avoided.

Port 1
These pins are connected to the banking system and controllers input.

Port 2
There pins are connected to the Graphics, Sound and most-significant bits of the socket’s address.

INT Pin
INT is unconnected, always read as logic 1.

T0 Pin
T0 is connected to the expansion port, there was never any expansion planned so can be assumed to be always logic 1.

T1 Pin
T1 is connected to the mirror’s sensor, it oscillate at a rate of approx. 15 times per sec.
Logic transition from 1 to 0 indicate that the image is ready to be drawn.
For more information check Graphics.

CPU hazards
Program counter increments by 1 in each fetch but A11 is not incremented.
So if code needs to cross between $7FF to $800, it needs to SET MB1 and JMP $800 instead or else the counter will warp-around to $000.
Program counter can cross between banks 0 to 7 and 8 to 15 freely but can still affect certain instructions implementations such as ones that take into account the lowest 8-bits of the PC: MOVP A, @A, JMPP @A and all conditional jumps.

SET MB0 and SET MB1 only take effect on JMP addr and CALL addr.
During interrupt, A11 is always output as logic 0. (Not important for AdventureVision but is always good to know)

Programming tricks

Array/Table read
Instruction MOVP A, @A can be used to read tables between the current page from the ROM area.

Graphics data
Because graphics only start at offset 6 in each bank you can write:
.org (bank address)
movp a, @a
ret
.db 0, 0, 0, 0  ; for padding
(Bank graphics here)

And send the whole image bank with:
mov r0, 0
loopback:
mov a, r0
call (bank address)
mov @r0, a
djnz r0, loopback

Up to 252 Bytes of data
Table code:
.org (bank address)
add a, 4
movp a, @a
ret
(Data content here)

To read table:
 ; Table offset on accumulator
call (bank address)
 ; Now the accumulator hold the data

Up to 254 Bytes of data
Table code:
.org (bank address)
movp a, @a
ret
(Data content here)

To read table:
 ; Table offset on accumulator
add a, 2
call (bank address)
 ; Now the accumulator hold the data

255 Bytes of data
Table code:
.org (bank address)
(Data content here) ; Must be exactly 255 bytes
movp a, @a    ; at address $xFF
ret           ; first byte of the next bank

To read table:
 ; Table offset on accumulator
call (bank address) + 255
 ; Now the accumulator hold the data

256 Bytes of data
For reading 256 bytes data it’s only possible by disabling BIOS and using MOVP3 A, @A instruction, data content must be in $300~$3FF.
.org $300
(Data content here)

To read table:
 ; Table offset on accumulator
movp3 a, @a
 ; Now the accumulator hold the data

Vector tables
This can be useful to implement states (such as AI).

Up to 127 vectors
Vector table:
.org (bank address)
inc a
jmpp @a
(list of vectors with JMP addr instruction)

To call the vector:
 ; Vector index on accumulator
jmp/call (bank address)

128 vectors
This is archived by using JMPP @A just 1 byte before the desired bank address.
Vector table:
.org (bank address) - 1
jmpp @a    ; Must be in $xFF
(list of vectors with JMP addr instruction)

To call the vector:
 ; Vector index on accumulator
jmp/call (bank address)

Downloads
MCS-48 Datasheet (Contains all 8048 information)
MCS-48 Datasheet (Older version, bigger file)